74LVX125 Datasheet
74LVX125 Datasheet (Fairchild Semiconductor)
Fairchild Semiconductor
The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Ordering Information Order .
* Input voltage level translation from 5V to 3V
* Ideal for low power/low noise 3.3V applications
* Guaranteed simultaneous switching noise level and
dynamic threshold performance
General Description
The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerat.
74LVX125 Datasheet (National Semiconductor)
National Semiconductor
The LVX125 contains four independent non-inverting buffers with TRI-STATE outputs The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems Features Y Input voltage lev.
Y Input voltage level translation from 5V to 3V Y Ideal for low power low noise 3 3V applications Y Available in SOIC JEDEC SOIC EIAJ and TSSOP packages Y Guaranteed simultaneous switching noise level and dy- namic threshold performance Logic Symbol Connection Diagram IEEE IEC Pin Assignment for.
74LVX125 Datasheet (STMicroelectronics)
STMicroelectronics
The 74LVX125 is a low voltage CMOS QUAD BUS BUFFERs fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3..
o be set high to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power .