74VHCT126 Datasheet
74VHCT126 Datasheet (Nexperia)
Nexperia
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC126; 74VH.
* Balanced propagation delays
* All inputs have Schmitt-trigger action
* Inputs accept voltages higher than VCC
* Input levels:
* The 74VHC126 operates with CMOS input level
* The 74VHCT126 operates with TTL input level
* ESD protection:
* HBM JESD22-A114E exceeds 2000 V
* MM JESD22-A115-A exceeds .
74VHCT126 Datasheet (NXP Semiconductors)
NXP Semiconductors
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are speciļ¬ed in compliance with JEDEC standard No. 7-A. The 74VHC126; 74VHC.
I Balanced propagation delays I All inputs have Schmitt-trigger action I Inputs accept voltages higher than VCC I Input levels: N The 74VHC126 operates with CMOS input level N The 74VHCT126 operates with TTL input level I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 2.