CDP1833C Datasheet and Specifications PDF

The CDP1833C is a CMOS 7-Bit Latch and Decoder Memory Interface.

Key Specifications

PackageDIP
Operating Voltage5 V
Max Operating Temp85 °C
Min Operating Temp-40 °C

CDP1833C Datasheet

CDP1833C Datasheet (Intersil)

Intersil

CDP1833C Datasheet Preview

The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems. It can serve as a direct interface between the multiplexed address bus of this s.


* Performs Memory Address Latch and Decoder Functions Multiplexed or Non-Multiplexed
* Interfaces Directly with the CDP1800-Series Microprocessors
* Allows Decoding for Systems Up to 32K Bytes Ordering Information 5V 10V TEMP. RANGE -40oC to +85oC PACKAGE PDIP PKG. NO. E20.3 CDP1883CE CDP1883E Pi.

CDP1833C Datasheet (GE)

GE

CDP1833C Datasheet Preview

Read-Only Memories (ROMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ CDP1833, CDP1833C, CDP1833BC MA7 MA6 MAO MA4 MA3 MA2 MAl MAO BUS 0 BUSt BUS2 vSS 24 23 3 22 4 21 5 2C 6 19 7 18 8 17 9 16 10 15 ".


* CDP1833BC is compatible with the CDP1802BC 5 MHz microprocessor
* On-chip address latch
* Interfaces with CDP1800-series microprocessors without additional components
* Optional programmable location within 64K memory space
* Three-state outputs The RCA-CDP1833, CDP1833C, and CDP1833BC are stati.

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