HD74HC294 Datasheet
HD74HC294 Datasheet (Hitachi Semiconductor)
Hitachi Semiconductor
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit. The devic.
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* High Speed Operation: tpd (Clock to Q) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
CLR L H H H H L H X X H CLK1 X .
HD74HC294 Datasheet (Renesas)
Renesas
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit. The devic.
* High Speed Operation: tpd (Clock to Q) = 16 ns typ (CL = 50 pF)
* High Output Current: Fanout of 10 LSTTL Loads
* Wide Operating Voltage: VCC = 2 to 6 V
* Low Input Current: 1 µA max
* Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
* Ordering Information
Part Name
Package T.