MK2049-36 Datasheet and Specifications PDF

The MK2049-36 is a 3.3 V Communications Clock PLL.

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Part NumberMK2049-36 Datasheet
ManufacturerIntegrated Circuit Systems
Overview The MK2049-36 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3/3, Gig.
* Packaged in 20 pin SOIC
* 3.3 V ±5% operation
* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E
* Accepts multiple inputs: 8 kHz backplane clock, or 10 to 50 MHz
* Locks to 8 kHz ±100 ppm (Ex.
Part NumberMK2049-36 Datasheet
DescriptionCLOCK PLL
ManufacturerRenesas
Overview The MK2049-36 is a Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and o.
* Packaged in 20 pin SOIC
* Pb (lead) free package
* 3.3 V + 5% operation
* Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E
* Accepts multiple inputs: 8 kHz backplane clock or 10 to 50 MHz
* Lo.