MK2049-36 Overview
Description
The MK2049-36 is a Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications frequencies.
Key Features
- Packaged in 20 pin SOIC
- Pb (lead) free package
- 3.3 V + 5% operation
- Accepts multiple inputs: 8 kHz backplane clock or 10 to 50 MHz
- Locks to 8 kHz + 100 ppm (External mode)
- Buffer Mode allows jitter attenuation of 10 - 50 MHz input and x1/x0.5 or x1/x2 outputs
- Exact internal ratios enable zero ppm error
- Output clock rates include T1, E1, T3, E3, and OC3 submultiples
