MPC9773 Datasheet
MPC9773 Datasheet (Renesas)
Renesas
The MPC9773 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9773 requires the connection of the PLL feedback output QFB to feedback inpu.
* 1:12 PLL based low-voltage clock generator
* 3.3 V power supply
* Internal power-on reset
* Generates clock signals up to 242.5 MHz
* Maximum output skew of 250 ps
* Differential PECL reference clock input
* Two LVCMOS PLL reference clock inputs
* External PLL feedback supports zero-delay capabili.
MPC9773 Datasheet (Freescale Semiconductor)
Freescale Semiconductor
Freescale Semiconductor Technical Data MPC9773 Rev 5, 08/2005 3.3 V 1:12 LVCMOS PLL Clock Generator MPC9773 The MPC9773 is a 3.3 V compatible, 1:12 PLL based clock generator targeted for high-perf.
* 1:12 PLL based low-voltage clock generator
* 3.3 V power supply
* Internal power-on reset
* Generates clock signals up to 242.5 MHz
* Maximum output skew of 250 ps
* Differential PECL reference clock input
* Two LVCMOS PLL reference clock inputs
* External PLL feedback supports zero-delay capabili.