P80C32 Datasheet and Specifications PDF

TEMIC’s 80C52 and 80C32 are high performance CMOS versions of the 8052/8032 NMOS single chip 8 bit µC. The fully static design of the TEMIC 80C52/80C32 allows to reduce system power consumption by bri.

of the 8052 : 8 K bytes of ROM ; 256 bytes of RAM ; 32 I/O lines ; three 16 bit timers ; a 6-source, 2-level interrupt structure ; a full duplex serial port ; and on-chip oscillator and clock circuits. In addition, the 80C52 has 2 software-selectable modes of reduced activity for further reduction i.

The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs incorporating Philips’ high-density CMOS technology with operation from 2.7 V to 5.5 V. They support.

* 80C51 Central Processing Unit
* 4 kbytes ROM/EPROM (80/87C51X2)
* 8 kbytes ROM/EPROM (80/87C52X2)
* 16 kbytes ROM/EPROM (80/87C54X2)
* 32 kbytes ROM/EPROM (80/87C58X2)
* 128 byte RAM (80/87C51X2 and 80C31X2)
* 256 byte RAM (80/87C52/54X2/58X2 and 80C32X2)
* Boolean processor
* Fully static operat.