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K176IE12 - Binary counter 60 and the 15-bit frequency divider electronic clock
Микросхема К176ИЕ12 Полупроводниковые интегральные микросхемы К176ИЕ12 предназначены для использования в качестве двоичного счетчика на 60 и 15-ти раз.ADAU1761 - 24-Bit Audio Codec
Data Sheet ADAU1761 SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL FEATURES ► SigmaDSP 28-/56-bit, 50 MIPS digital audio .NHi-15765 - Monolithic 2Mbit-1553/1760 Transceivers
Data Device Corporation 1-800-DDC-5757 | 631-567-5600 105 Wilbur Place, Bohemia, NY 11716 service@ddc-web.com | www.ddc-web.com NHi-15765/66 NHi-15LV.NHi-15766 - Monolithic 2Mbit-1553/1760 Transceivers
Data Device Corporation 1-800-DDC-5757 | 631-567-5600 105 Wilbur Place, Bohemia, NY 11716 service@ddc-web.com | www.ddc-web.com NHi-15765/66 NHi-15LV.PIC16LF1765 - 8-Bit Flash Microcontrollers
PIC16(L)F1764/5/8/9 14/20-Pin, 8-Bit Flash Microcontrollers Description The PIC16(L)F1764/5/8/9 family offers intelligent analog with digital periph.PIC16F1765 - 8-Bit Flash Microcontrollers
PIC16(L)F1764/5/8/9 14/20-Pin, 8-Bit Flash Microcontrollers Description The PIC16(L)F1764/5/8/9 family offers intelligent analog with digital periph.PIC16F1764 - 8-Bit Flash Microcontrollers
PIC16(L)F1764/5/8/9 14/20-Pin, 8-Bit Flash Microcontrollers Description The PIC16(L)F1764/5/8/9 family offers intelligent analog with digital periph.MC56F81766LMLF - 32-bit Digital Signal Controller
NXP Semiconductors Data Sheet: Technical Data MC56F81xxx Supports MC56F81xxxL and MC56F81xxxA Features • This family of digital signal controllers (DS.MC56F81766LVLF - 32-bit Digital Signal Controller
NXP Semiconductors Data Sheet: Technical Data MC56F81xxx Supports MC56F81xxxL and MC56F81xxxA Features • This family of digital signal controllers (DS.AD9176S - Dual 16-Bit 12.6 GSPS RF DAC
Data Sheet AD9176S Commercial Space Product FEATURES Dual, 16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers APPLICATIONS ► Supports multiband wi.IDT72P51769 - 1.8V MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION
1.8V MULTI-QUEUE FLOW-CONTROL DEVICES (128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 bits 2,359,296 bits 4,718,592 bits ADVANCE INFORMATION www.Dat.CY7C11761KV18 - 18-Mbit QDR II SRAM 4-Word Burst Architecture
18-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C.