5VECL Datasheet | Specifications & PDF Download

MC10E155, MC100E155 5V ECL 6−Bit 2:1 Mux−Latch Description The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with singl

(10 views)

MC10EP451, MC100EP451 3.3V / 5V ECL 6-Bit Differential Register with Master Reset Description The MC10/100EP451 is a 6−bit fully differential registe

(9 views)

MC10EP33, MC100EP33 3.3 V/5 V ECL B4 Divider Description The MC10/100EP33 is an integrated B4 divider. The differential clock inputs. The VBB pin, an

(7 views)

MC10EP016, MC100EP016 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter Description The MC10/100EP016 is a high-speed synchronous, presettable, casca

(5 views)

MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Ea

(4 views)

MC10EP11, MC100EP11 3.3 V / 5 V ECL 1:2 Differential Fanout Buffer Description The MC10/100EP11 is a differential 1:2 fanout buffer. The device is pin

(4 views)

MC10EP56, MC100EP56 3.3V / 5V ECL Dual Differential 2:1 Multiplexer Description The MC10/100EP56 is a dual, fully differential 2:1 multiplexer. The d

(2 views)

MC10E155, MC100E155 5V ECL 6−Bit 2:1 Mux−Latch Description The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with singl

(2 views)

MC10EP016, MC100EP016 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter Description The MC10/100EP016 is a high-speed synchronous, presettable, casca

(2 views)

MC10EP451, MC100EP451 3.3V / 5V ECL 6-Bit Differential Register with Master Reset Description The MC10/100EP451 is a 6−bit fully differential registe

(2 views)