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MC10EP016 - 3.3V / 5VECL 8-Bit Synchronous Binary Up Counter

Datasheet Summary

Description

cascadeable 8-bit binary counter.

Architecture and operation are the same as the MC10E016 in the ECLinPS™ family.

Features

  • internal feedback to TC gated by the TCLD (Terminal Count Load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all-one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate properly. To.

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Datasheet Details

Part number MC10EP016
Manufacturer ON Semiconductor
File Size 177.72 KB
Description 3.3V / 5VECL 8-Bit Synchronous Binary Up Counter
Datasheet download datasheet MC10EP016 Datasheet
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Full PDF Text Transcription

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MC10EP016, MC100EP016 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter Description The MC10/100EP016 is a high-speed synchronous, presettable, cascadeable 8-bit binary counter. Architecture and operation are the same as the MC10E016 in the ECLinPS™ family. The counter features internal feedback to TC gated by the TCLD (Terminal Count Load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all-one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate properly.
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