Part Number | Description | Manufacture |
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Low Voltage Quad Buffer ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance General Description The LVX125 contains four independent non-invertin |
![]() Fairchild Semiconductor |
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Low Voltage IEEE 161284 Translating Transceiver s Supports IEEE 1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals s Translation capability allows outputs on the cable side to interface with 5V signals s All in |
![]() Fairchild Semiconductor |
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Quad Analog Switch/Multiplexer/Demultiplexer • Fast Switching and Propagation Speeds • High ON/OFF Output Voltage Ratio • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Wide Power−Supply Voltage Range (VCC − GND) = 2.0 to 6.0 Volts • Analog Input Voltage Range (VCC − |
![]() ON Semiconductor |
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LOW-VOLTAGE CMOS 5 A2 6 O2 7 GND Figure 1. 14 –Lead Pinout (Top View) M SUFFIX 14 –LEAD SOIC EIAJ PACKAGE CASE 965 –01 A0 A1 A2 A3 A4 A5 1 3 5 9 11 13 PIN NAMES 2 4 6 8 10 12 O0 O1 O2 Pins An On Function Data Inputs Outputs FUNCTION TABLE O3 O4 O5 An L H On H |
![]() ON Semiconductor |
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Low Voltage Octal D-Type Flip-Flop s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX574M 74LVX574SJ 74LVX574MTC Package Number |
![]() Fairchild Semiconductor |
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Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance General Description The LVX74 is a dual D-type flip-flop with Asynchr |
![]() Fairchild Semiconductor |
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LOW-VOLTAGE CMOS 9 D SUFFIX 16 –LEAD SOIC PACKAGE CASE 751B –05 DT SUFFIX 16 –LEAD TSSOP PACKAGE CASE 948F –01 1 S 2 I0a 3 I1a 4 Za 5 I0b 6 I1b 7 Zb 8 GND Figure 1. 16 –Lead Pinout (Top View) 1 M SUFFIX 16 –LEAD SOIC EIAJ PACKAGE CASE 966 –01 S E I0a I1a I0b I |
![]() Motorola |
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Dual Supply Octal Bus Transceiver • Bi-directional interface between 5 V and 3 V buses • High-speed: tpd = 6.0 ns (typ.) (VCCA = 5.0 V, VCCB = 3.3 V) • Low power dissipation: ICC = 8 μA (max) (Ta = 25°C) • Symmetrical output impedance: IOUTA = ±24 mA (min) IOUTB = ±12 mA (min) (VCCA |
![]() Toshiba Semiconductor |
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Hex Inverter ta Inputs Outputs FUNCTION TABLE An L H On H L Figure 2. Logic Diagram 6/97 © Motorola, Inc. 1997 1 REV 0 DataSheet 4 U .com www.DataSheet4U.com ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ |
![]() Motorola |
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Quad 2-Input OR Gate On Function Data Inputs Outputs FUNCTION TABLE Figure 2. Logic Diagram An L L H H INPUTS Bn L H L H OUTPUTS On L H H H 6/97 © Motorola, Inc. 1997 1 REV 0 DataSheet 4 U .com www.DataSheet4U.com ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ |
![]() Motorola |
Total 167 results |