C1165 Datasheet | Specifications & PDF Download

www.DataSheet4U.com www.DataSheet4U.com

(23 views)

18-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C

(17 views)

CY7C1161V18 CY7C1176V18 CY7C1163V18 CY7C1165V18 18-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features ■ Functional Descr

(16 views)

CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Features ■ Configu

(14 views)

LTC1163/LTC1165 Triple 1.8V to 6V High-Side MOSFET Drivers FEATURES s s s s s s s s s s DESCRIPTIO Operates from 1.8V to 6V 0.01µA Standby Current

(12 views)

Data Sheet 11.07 GHz to 11.62 GHz, MMIC VCO with Half Frequency Output HMC1165 FEATURES Dual output frequency range fOUT = 11.07 GHz to 11.62 GHz fO

(12 views)

SILICON NPN EPITAXIAL PLANAR TYPE UHF BAND POWER AMPLIFIER APPLICATIONS. FEATURES . Output Power : F o =0. 9W(Min. (f=470MHz, Vcc=12.6V, 5 I i=

(12 views)

74AC11652 OCTAL BUS TRANSCEIVER AND REGISTERS WITH 3-STATE OUTPUTS SCAS088A - DECEMBER 1989 - REVISED APRIL 1996 D Independent Registers and Enables

(11 views)

PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER, DUAL LOW DROPOUT REGULATOR CONTROLLER October 25, 1999 SC1164/5 TEL:805-498-2111 FAX:805-498-3804 WEB:http

(10 views)

• Independent Registers and Enables for A and B Buses • Multiplexed Real-Time and Stored Data • Inverting Data Paths • Flow-Through Architecture Optim

(10 views)

Data Sheet, V1.0, Apr. 2008 TC1165/TC1166 32-Bit Single-Chip Microcontroller TriCore Microcontrollers Edition 2008-04 Published by Infineon Technolog

(4 views)