Part Number | Description | Manufacture |
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256Mb (32MB) FL-S Flash • CMOS 3.0 V core with versatile I/O • SPI with multi-I/O - SPI clock polarity and phase modes 0 and 3 - DDR option - Extended addressing: 24- or 32-bit address options - Serial command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P |
![]() Infineon |
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3.0V FL-L Flash Memory a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad |
![]() Cypress |
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3.0V SPI Flash Memory ■ CMOS 3.0 Volt Core with Versatile I/O ■ SPI with Multi-I/O ❐ SPI Clock polarity and phase modes 0 and 3 ❐ DDR option ❐ Extended Addressing: 24- or 32-bit address options ❐ Serial Command set and footprint compatible with S25FL-A, S25FL-K, and S25FL |
![]() Cypress |
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256Mb (32MB) FL-S Flash • Density - 256 Mb (32 MB) - 512 Mb (64 MB) • SPI - SPI clock polarity and phase modes 0 and 3 - DDR option - Extended addressing: 24- or 32-bit address options • READ commands - Dual-Quad SPI Quad Read: 104 MHz clock rate (104 MB/s) - Dual-Quad SPI |
![]() Infineon |
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Flash Non-Volatile Memory CMOS 3.0 Volt Core Density – 128 Mbits (16 Mbytes) – 256 Mbits (32 Mbytes) Serial Peripheral Interface (SPI) – SPI Clock polarity and phase modes 0 and 3 – Double Data Rate (DDR) option – Extended Addressing: 24- or 32-bit address options – Serial Command set and f |
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256-Mbit CMOS 3.0 Volt Flash Memory Memory protection – W#/ACC pin works in conjunction with Status Register Bits to protect specified memory areas – Status Register Block Protection bits (BP2, BP1, BP0) in status General Description This document contains information for the S70FL2 |
![]() SPANSION |