KM416S4030C Revision History Revision 1 (May 1998).
KM416S4030C - 1M x 16Bit x 4 Banks Synchronous DRAM
KM416S4030C Revision History Revision 1 (May 1998) - ICC2 N value (10mA) is changed to 12mA. Preliminary CMOS SDRAM Revision .2 (June 1998) - tSH (-.