SDRAM (Rev.0.2) Jan'97 Preliminary MITSUBISHI LSI.
Mitsubishi
M5M4V64S20ATP-12 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
SDRAM (Rev.0.2) Jan'97 Preliminary MITSUBISHI LSIs M5M4V64S20ATP-8, -10, -12 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM PRELIMINARY Some.
