SN74F10 Datasheet | Specifications & PDF Download

SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDFS047A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options I

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D Designed to Reduce Reflection Noise D Repetitive Peak Forward Current 300 mA D 8-Bit Array Structure Suited for Bus-Oriented Systems description Thi

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• Designed to Reduce Reflection Noise • Repetitive Peak Forward Current . . . 300 mA • 16-Bit Array Structure Suited for Bus-Oriented Systems descript

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• Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devic

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