
74LS73 (Fairchild Semiconductor)
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
MASTERGAN1 Datasheet High power density 600V Half .
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
DC-MASTER Operating Instructions
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
2-stage (Master-slave) D flip-flop
Small Size LCD TV Processor
Small Size LCD TV Processor
PCI Bus Mastering I/O Accelerator
2-channel I2C-bus master arbiter
1-Wire-to-I2C Master Bridge
Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
Next Generation 32-bit Pci Bus Mastering Interface Chip
2-to-1 I2C-bus master selector
MIPI Master Bridge
SMD POWER INDUCTORS
Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
66 MHz PCI Bus Mastering I/O Accelerator
Safe Master
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
Multiphase Master
Dual Type D Master-Slave Flip-Flop
master Distributor