SSD2828QN4 - MIPI Master Bridge
of END and CO (Section 8.1.38) - Modify the timing for data latch in RGB timing (Section 14.4) - Specify the prefix T in RGB timing (Section14.4) - Modify RGB color arrangement (Table 6-3) - Update power up and power down sequence (Section 15 & Section 16) - Include current consumption of using VDDI
