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DF112 - CMOS Gate Array

Download the DF112 datasheet PDF. This datasheet also covers the DF111 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

DF11x is a family of static, master-slave D flip-flops.

RESET is asynchronous and active low.

Outputs are buffered and change state on the rising edge of the clock.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DF111-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DF112
Manufacturer AMI
File Size 40.60 KB
Description CMOS Gate Array
Datasheet download datasheet DF112 Datasheet

Full PDF Text Transcription for DF112 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DF112. For precise diagrams, and layout, please refer to the original PDF.

Core Logic ')[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DF11x is a family of static, master-slave D flip-flops. RESET is asynchronous and active low. Outputs are ...

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slave D flip-flops. RESET is asynchronous and active low. Outputs are buffered and change state on the rising edge of the clock. Logic Symbol Truth Table DF11x DQ C RQ RN D C Q QN L XX LH HL ↑ LH HH ↑H L H X L NC NC NC = No Change HDL Syntax Verilog...................DF11x inst_name (Q, QN, C, D, RN); VHDL...................... inst_DF11x : DF11x port map (Q, QN, C, D, RN); Pin Loading Pin Name D C RN DF111 1.0 1.0 1.0 Equivalent Loads DF112 DF114 1.0 1.0 1.0 1.0 1.0 1.0 DF116 1.0 1.0 1.0 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DF111 9.0 TBD 21

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