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DF1F2 - CMOS Gate Array

Download the DF1F2 datasheet PDF. This datasheet also covers the DF1F1 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

DF1Fx is a family of static, master-slave D flip-flops without SET or RESET.

Outputs are buffered and change state on the rising edge of the clock.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DF1F1-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DF1F2
Manufacturer AMI
File Size 36.88 KB
Description CMOS Gate Array
Datasheet download datasheet DF1F2 Datasheet

Full PDF Text Transcription for DF1F2 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for DF1F2. For precise diagrams, and layout, please refer to the original PDF.

Core Logic '))[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DF1Fx is a family of static, master-slave D flip-flops without SET or RESET. Outputs are buffered and chan...

View more extracted text
slave D flip-flops without SET or RESET. Outputs are buffered and change state on the rising edge of the clock. Logic Symbol Truth Table DF1Fx DQ C Q D C Q QN XX L H L ↑LH H↑HL X L NC NC NC = No Change HDL Syntax Verilog .................... DF1Fx inst_name (Q, QN, C, D); VHDL...................... inst_name: DF1Fx port map (Q, QN, C, D) Pin Loading Pin Name D C DF1F1 1.0 1.0 Equivalent Loads DF1F2 DF1F4 1.0 1.0 1.0 1.0 DF1F6 1.0 1.0 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DF1F1 7.0 TBD 17.4 DF1F2 8.0 TBD 20.7 DF1F4 11.0 TBD 30.7 DF1F6 14.0 TBD

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