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• A high-performance, low-power CMOS megacell
featuring functional compatibility with the industry
• 4-Bit cascadable bit-slice
• Eight function ALU including addition, two subtraction
and five logic operations on two operands
• Microprogrammable with three groups of three bits each
for ALU function, destination control and source
• Two address architecture provides independent access
to two working registers
• Five source ports for data selection
• Four status flags including carry, zero, overflow and sign
• Equivalent gates:
Standard Cell - 810; Gate Array - 1000
MG29C10 is a high-performance 12-bit microprogram
controller. It functions as an address sequencer for con-
trolling the execution of microinstructions in
It also controls conditional branching to any microinstruc-
tion within its 4096 word range. There are nine levels of
subroutine nesting with return linkage and looping capa-
bility provided by a last-in, first-out stack.
The MG29C10 has four sources for providing the 12-bit
address during each microinstruction. These four sources
are as follows:
1. A direct external input.
2. A register/counter (R) which retains data loaded dur-
ing an earlier microinstruction.
3. The last-in, first-out stack/file (F).
4. The address counter/register which usually incre-
ments the addresses.
The MG29C10 consists of six functional blocks: an
instruction PLA, a multiplexer, a register/counter, a zero
detector, a 9-word by 12-bit stack, a microprogram
counter register, and an incrementer.