Datasheet Summary
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Preliminary
Document Title 1M X 16 Bit X 2 Banks Synchronous DRAM Revision History
Rev. No.
1M X 16 Bit X 2 Banks Synchronous DRAM
History
Initial issue
Issue Date
August 2, 2005
Remark
Preliminary
PRELIMINARY
(August, 2005, Version 0.0)
AMIC Technology, Corp.
Preliminary
Features
Power supply
- VDD: 3.3V VDDQ : 3.3V LVTTL patible with multiplexed address Two banks / Pulse RAS MRS cycle with address key programs
- CAS Latency (2 & 3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave) Clock Frequency (max) : 167MHz @ CL=3 (-6) 143MHz @ CL=3 (-7)
1M X 16 Bit X 2 Banks Synchronous DRAM
All inputs are sampled at...