256k x 16/18/ 128k x 32/36 lvttl/ pipelined dba sram.
n Fast access time: 4.5/5.0/6.0 ns (117/100/83MHz) n Direct Bus Alternation between READ and WRITE cycles allows 100% bus utilization n Signal +3.3V ± 5% power supply n I.
n Three separate chip enables allow wide range of options for CE control, address pipelining n Internally self-timed wri.
The AMIC Direct Bus Alternation™ (DBA™) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. The A67L8316, A67L8318, A67L7332, A67L7336 SRAMs integrate a 256K X 16, 256K X 18, 128K X 32 or 128K X 36 SRAM core with ad.
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