SAM9260 Datasheet | Atmel

Features - 180 MHz ARM926EJ-S™ ARM® Thumb® Processor - 8 KBytes Data Cache, 8 KBytes Instruction Cache, MMU - Memories - 32-bit External Bus Interface supporting 4-bank SDRAM/LPSDR, Static Memories, pact Flash, SLC NAND Flash with ECC - Two 4-kbyte internal SRAM, single-cycle access at system speed - One 32-kbyte internal ROM, embedding bootstrap routine - Peripherals - ITU-R BT. 601/656 Image Sensor Interface - USB Device and USB Host with dedicated On-Chip Transceiver - 10/100 Mbps Ethernet MAC Controller - One High Speed Memory Card Host - Two Master/Slave Serial Peripheral Interfaces - Two Three-channel 32-bit Timer/Counters - One Synchronous Serial Controller - One Two-wire Interface - Four USARTs - Two UARTs - 4-channel 10-bit ADC - System - 90 MHz six 32-bit layer AHB Bus Matrix - 22 Peripheral DMA Channels - Boot from NAND Flash, Data Flash® or serial Data Flash - Reset Controller with On-Chip Power-on Reset - Selectable 32,768 Hz Low-Power and 3-20 MHz Main Oscillator - Internal Low-Power 32 k Hz RC Oscillator - One PLL for the system and one PLL optimized for USB - Two Programmable External Clock Signals - Advanced Interrupt Controller and Debug Unit - Periodic Interval Timer, Watchdog Timer and Real Time Timer - I/O - Three 32-bit Parallel Input/Output Controllers - 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os - Package - 217-ball BGA, 0.8 mm pitch - 208-pin QFP, 0.5 mm pitch This is a summary document. The plete document is available on the Atmel website at .atmel.. 6221LS- ATARM- 15-Oct-12 1. Description The SAM9260 is based on the integration of an ARM926EJ-S processor with fast ROM and RAM memories and a wide range of...