AT89C51CC02
Overview
- 80C51 Core Architecture
- 256 Bytes of On-chip RAM
- 256 Bytes of On-chip XRAM
- 16K Bytes of On-chip Flash Memory - Data Retention: 10 Years at 85°C - Erase/Write Cycle: 100K
- Boot Code Section with Independent Lock Bits
- 2K Bytes of On-chip Flash for Bootloader
- In-System Programming by On-Chip Boot Program (CAN, UART) and IAP Capability
- 2K Bytes of On-chip EEPROM - Erase/Write Cycle: 100K
- 14-sources 4-level Interrupts
- Three 16-bit Timers/Counters
