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AS7C3364NTF32B - (AS7C3364NTF32B / AS7C3364NTF36B) 3.3V 64K x 32/36 Flowthrough Synchronous SRAM

Description

The AS7C3364NTF32B/36B family is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) organized as 65,536 words × 32 or 36 bits and incorporates a LATE Write.

Features

  • Organization: 65,536 words × 32 or 36 bits.
  • NTD™architecture for efficient bus operation.
  • Fast clock to data access: 7.5/8.0/10.0 ns.
  • Fast OE access time: 3.5/4.0 ns.
  • Fully synchronous operation.
  • Flow-through mode.
  • Asynchronous output enable control.
  • Available in 100-pin TQFP package www. DataSheet4U. com.
  • Byte write enables.
  • Clock enable for operation hold.

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Datasheet Details

Part number AS7C3364NTF32B
Manufacturer Alliance Semiconductor Corporation
File Size 464.12 KB
Description (AS7C3364NTF32B / AS7C3364NTF36B) 3.3V 64K x 32/36 Flowthrough Synchronous SRAM
Datasheet download datasheet AS7C3364NTF32B Datasheet

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  • AS7C3364PFS32A - (AS7C3364PFS32A / AS7C3364PFS36A) 3.3V 64K X 32/36 pipeline burst synchronous SRAM
  • AS7C3364PFS32B - (AS7C3364PFS32B / AS7C3364PFS36B) 3.3V 64K X 32/36 pipeline burst synchronous SRAM

Full PDF Text Transcription

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April 2005 ® AS7C3364NTF32B AS7C3364NTF36B 3.3V 64K × 32/36 Flowthrough Synchronous SRAM with NTDTM Features • Organization: 65,536 words × 32 or 36 bits • NTD™architecture for efficient bus operation • Fast clock to data access: 7.5/8.0/10.0 ns • Fast OE access time: 3.5/4.0 ns • Fully synchronous operation • Flow-through mode • Asynchronous output enable control • Available in 100-pin TQFP package www.DataSheet4U.com • Byte write enables • Clock enable for operation hold • • • • • • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.
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