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EP2S180 - Stratix II Device

Download the EP2S180 datasheet PDF. This datasheet also covers the EP2S15 variant, as both devices belong to the same stratix ii device family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Altera Corporation May 2007 The Stratix® II FPGA family is based on a 1.2-V, 90-nm, all-layer copper SRAM process and features a new logic structure that maximizes performance, and enables device densities approaching 180,000 equivalent logic elements (LEs). Stratix II devices offer up to 9 Mbits of on-chip, TriMatrix™ memory for demanding, memory intensive.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (EP2S15-Altera.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number EP2S180
Manufacturer Altera
File Size 1.14 MB
Description Stratix II Device
Datasheet download datasheet EP2S180 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix® II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference to power consumption, and ordering information for Stratix II devices. This section contains the following chapters: ■ Chapter 1, Introduction ■ Chapter 2, Stratix II Architecture ■ Chapter 3, Configuration & Testing ■ Chapter 4, Hot Socketing & Power-On Reset ■ Chapter 5, DC & Switching Characteristics ■ Chapter 6, Reference & Ordering Information Revision History Refer to each chapter for its own specific revision history.