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EPM9320 - Max 9000(a) Programmable Logic Device Family (6k Gates)

Description

The MAX 9000 family of in-system-programmable, high-density, highperformance EPLDs is based on Altera’s third-generation MAX architecture.

Features

  • High-performance CMOS EEPROM-based programmable logic devices (PLDs) built on third-generation Multiple Array MatriX (MAX®) architecture 5.0-V in-system programmability (ISP) through built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990 High-density erasable programmable logic device (EPLD) family ranging from 6,000 to.

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Datasheet Details

Part number EPM9320
Manufacturer Altera Corporation
File Size 540.99 KB
Description Max 9000(a) Programmable Logic Device Family (6k Gates)
Datasheet download datasheet EPM9320 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com ® Includes MAX 9000A MAX 9000 Programmable Logic Device Family Data Sheet December 2002, ver. 6.4 Features... ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices (PLDs) built on third-generation Multiple Array MatriX (MAX®) architecture 5.0-V in-system programmability (ISP) through built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.
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