AD1896 Overview
FUNCTIONAL BLOCK DIAGRAM GRPDLYS RESET VDD_IO VDD_CORE MUTE_I SDATA_I SCLK_I LRCLK_I SMODE_IN_0 SMODE_IN_1 SMODE_IN_2 BYPASS MUTE_O CLOCK DIVIDER ROM WLNGTH_O_0 WLNGTH_O_1 SERIAL INPUT DIGITAL PLL FIR FILTER SERIAL OUTPUT FIFO FSOUT FSIN AD1896