AD53040 Datasheet | Analog Devices

FEATURES 500 MHz Driver Operation Driver Inhibit Function 100 ps Edge Matching Guaranteed Industry Specifications 50 ⍀ Output Impedance >1.5 V/ns Slew Rate Variable Output Voltages for ECL, TTL and CMOS High Speed Differential Inputs for Maximum Flexibility Ultrasmall 20-Lead SOP Package with Built-In Heat Sink APPLICATIONS Automatic Test Equipment Semiconductor Test Systems Board Test Systems Instrumentation and Characterization Equipment Ultrahigh Speed Pin Driver with Inhibit Mode FUNCTIONAL BLOCK DIAGRAM VCC VCC VH DATA DATA INH INH DRIVER 50⍀ 1.0␮A/K 39n F 39n F VHDCPL VOUT VLDCPL TVCC THERM GND GND GND GND GND PRODUCT DESCRIPTION The AD53040 is a plete high speed pin driver designed for use in digital or mixed-signal test systems. bining a high speed monolithic process with a unique surface mount package, this product attains superb electrical performance while preserving optimum packaging densities and long-term reliability in an ultrasmall 20-lead, SOP package with built-in heat sink. Featuring unity gain programmable output levels of - 3 V to +8 V, with output swing capability of less than 100 m V to 9 V, the AD53040 is designed to stimulate ECL, TTL and CMOS logic families. The 500 MHz data rate capacity and matched output impedance allows for real-time stimulation of these digital logic families. To test I/O devices, the pin driver can be switched into a high impedance state (Inhibit Mode), electrically removing the driver from the path. The pin driver leakage current inhibit is typically 100 n A and output charge transfer entering inhibit is typically less than 20 p C. The AD53040 transition from HI/LO or to inhibit is controlled through the data and inhibit inputs. The input circuitry uses high speed differential inputs with a mon-mode range of ± 3 V. This allows for direct interface to precision differential ECL timing or the simplicity of stimulating the pin driver from a single ended TTL or CMOS logic source. The...