Mixed-Signal Front-End Processor with Dual Converter Receive and Dual Converter Transmit Signal Paths Receive Signal Path Includes: Two 10-/12-Bit, 64 MSPS Sampling A/D C.

Broadband Wireless Systems Fixed Wireless, WLAN, MMDS, LMDS Broadband Wireline Systems Cable Modems, VDSL, PowerPlug Dig.

⌺-⌬ LOGIC LOW AD9860/AD9862 SPI REGISTERS SPI INTERFACE AUX_DAC_A AUX_DAC_B AUX_DAC_C AUX DAC AUX DAC AUX DAC Rx PATH TIMING Tx PATH TIMING AUX ADC CLOCK DISTRIBUTION BLOCK DLL 1؋, 2؋, 4؋ OSC1 OSC2 AUX_ADC_A1 AUX_ADC_A2 AUX_ADC_B1 AUX ADC AU.

AD9861

AD9862

AD9863

AD9864

AD9865

AD9866

AD9867

AD9868

AD9869

AD9801

AD9802

AD9803

AD9804