ADAU1978 Datasheet - Analog Devices

Quad Analog-to-Digital Converter

ADAU1978 Features

* Four 2 V rms differential inputs On-chip phase-locked loop (PLL) for master clock Low electromagnetic interference (EMI) design 109 dB analog-to-digital converter (ADC) dynamic range Total harmonic distortion + noise (THD + N):

* 95 dB Selectable digital high-pass filter 24-bit stereo ADC wit

ADAU1978 General Description

The ADAU1978 incorporates four high performance, analogto-digital converters (ADCs) with 2 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows.

ADAU1978 Datasheet (1.69 MB)