Overvoltage protection up to −55 V and +55 V
Power-off protection up to −55 V and +55 V
Overvoltage detection on source pins
Low charge injection (QINJ): −0.4 pC
Low on capacitance
ADG5208F: 20 pF
ADG5209F: 14 pF
Latch-up immune under any circumstance
Known state without digital inputs present
VSS to VDD analog signal range
±5 V to ±22 V dual supply operation
8 V to 44 V single-supply operation
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
Analog input/output modules
Process control/distributed control systems
Automatic test equipment
The ADG5208F and ADG5209F are 8:1 and dual 4:1 analog
multiplexers. The ADG5208F switches one of eight inputs to a
common output, and the ADG5209F switches one of four
differential inputs to a common differential output. An EN input
on both devices enables or disables the device. Each channel
conducts equally well in both directions when on, and each
channel has an input signal range that extends to the supplies.
The digital inputs are compatible with 3 V logic inputs over the
full operating supply range.
When no power supplies are present, the channel remains in the off
condition, and the switch inputs are high impedance. Under normal
operating conditions, if the analog input signal levels on any Sx pin
exceed VDD or VSS by a threshold voltage (VT) the channel turns
off and the drain pin is pulled to the supply voltage that was
exceeded. Input signal levels of up to −55 V or +55 V relative to
ground are blocked, in both the powered and unpowered conditions.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Fault Protection, −0.4 pC QINJ,
8:1/Dual 4:1 Multiplexers
FUNCTIONAL BLOCK DIAGRAMS
A0 A1 A2 EN
Figure 1. ADG5208F Functional Block Diagram
A0 A1 EN
Figure 2. ADG5209F Functional Block Diagram
The low capacitance and charge injection of these switches make
them ideal solutions for data acquisition and sample-and-hold
applications, where low glitch switching and fast settling times
1. The source pins are protected against voltages greater than
the supply rails, up to −55 V and +55 V.
2. The source pins are protected against voltages between
−55 V and +55 V in an unpowered state.
3. Trench isolation guards against latch-up.
4. Optimized for low charge injection and on capacitance.
5. The ADG5208F/ADG5209F can be operated from a dual
supply of ±5 V up to ±22 V or a single power supply of 8 V
up to 44 V.
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