* ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typical differential skew 400 ps maximum differential skew 2 ns maximum propagation delay 3.3 V power supply ±350 mV differential signaling Low power dissipation (13 mW typical) Interoperable with existing 5 V LVDS receiv
ADN4665
362.33 KB
Cmos differential line driver.
www.DataSheet4U.com 3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 FUNCTIONAL BLOCK DIAGRAM ADN4665 DIN1 D1 DOUT1+ DOUT1 EN D4 DOUT4.
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