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ADP1762 Datasheet CMOS Linear Regulator

Manufacturer: Analog Devices

Overview: Data Sheet.

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General Description

The ADP1762 is a low noise, low dropout (LDO) linear regulator.

It is designed to operate from a single input supply with an input voltage as low as 1.10 V, without the requirement of an external bias supply, to increase efficiency and provide up to 2 A of output current.

The low 62 mV typical dropout voltage at a 2 A load allows the ADP1762 to operate with a small headroom while maintaining regulation and providing better efficiency.

Key Features

  • 2 A maximum output current Low input voltage supply range VIN = 1.10 V to 1.98 V, no external bias supply required Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V Ultralow noise: 2 μV rms, 100 Hz to 100 kHz Noise spectral density 4 nV/√Hz at 10 kHz 3 nV/√Hz at 100 kHz Low dropout voltage: 62 mV typical at 2 A load Operating supply current: 4.5 mA typical at no load ±1.5% fixed output voltage accuracy over line, load, and temperat.

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