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ADP7118 - CMOS LDO Linear Regulator

General Description

The ADP7118 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 20 V and provides up to 200 mA of output current.

This high input voltage LDO is ideal for the regulation of high performance analog and mixed-signal circuits operating from 19 V down to 1.2 V rails.

Key Features

  • Low noise: 11 µV rms independent of fixed output voltage.
  • PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT ≤ 5 V, VIN = 7 V.
  • Input voltage range: 2.7 V to 20 V.
  • Maximum output current: 200 mA.
  • Initial accuracy: ±0.8%.
  • Accuracy over line, load, and temperature.
  • 1.2% to +1.5%, TJ =.
  • 40°C to +85°C.
  • ±1.8%, TJ =.
  • 40°C to +125°C.
  • Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5V.
  • User programmabl.

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Full PDF Text Transcription for ADP7118 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for ADP7118. For precise diagrams, tables, and layout, please refer to the original PDF.

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Data Sheet ADP7118 20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator FEATURES ► Low noise: 11 µV rms independent of fixed output voltage ► PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT ≤ 5 V, VIN = 7 V ► Input voltage range: 2.7 V to 20 V ► Maximum output current: 200 mA ► Initial accuracy: ±0.8% ► Accuracy over line, load, and temperature ► −1.2% to +1.5%, TJ = −40°C to +85°C ► ±1.8%, TJ = −40°C to +125°C ► Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5V ► User programmable soft start (LFCSP and SOIC only) ► Low quiescent current, IGND = 50 μA (typical) with no load ► Low shutdown current: 1.8 μA at VIN = 5 V, 3.0 μA at VIN = 20 V ► Stable with a small 2.2 µF ceramic output capacitor ► Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.