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ADP7112 Datasheet CMOS Ldo Linear Regulator

Manufacturer: Analog Devices

Overview: Data Sheet.

General Description

The ADP7112 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 20 V and provides up to 200 mA of output current.

This high input voltage LDO is ideal for the regulation of high performance analog and mixed-signal circuits operating from 19 V down to 1.2 V rails.

Using an advanced proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2 μF ceramic output capacitor.

Key Features

  • Low noise: 11 μV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT = 5 V, VIN = 7 V Input voltage range: 2.7 V to 20 V Maximum output current: 200 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature ±1.8%, TJ =.
  • 40°C to +125°C Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5 V User-programmable soft start Low quiescent current, IGND = 50 μA (typical) with no load Low shutdown current 1.8 μA at VIN = 5.

ADP7112 Distributor

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