ADSP-21267

The ADSP-21267 is Preliminary Technical Data designed by Analog Devices.

Product Overview

Analog Devices

Part number	ADSP-21267
Manufacturer	Analog Devices
File Size	510.82 KB
Description	Preliminary Technical Data
Datasheet	ADSP-21267_AnalogDevices.pdf
Additional preview pages of the ADSP-21267 datasheet.

The ADSP-21267 SHARC DSP is a member of the SIMD SHARC family of DSPs featuring Analog Devices' Super Harvard Architecture.

At 150 MHz (6.65 ns) core instruction rate, the ADSP-21267 operates at 900 MFLOPS performance whether operating on fixed or floating point data 300 MMACS sustained performance at 150 MHz Code compatibility.
At assembly level, uses the same instruction set as other SHARC DSPs Super Harvard Architecture.
three independent buses for dual data fetch, instruction fetch, and nonintrusive, zerooverhead I/O 1M Bit on-chip dual-ported SRAM (0.5M Bit in block 0 and 0.5M Bit in block 1) for s.

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Published: Dec 27, 2006 |