ADSP-21371 Datasheet, Analog Devices

include JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a .

interface, S/PDIF transceiver, serial ports, precision clock generators, and more. For complete ordering information, se.

................................................. 3 SHARC Family Core Architecture ............................ 4 Family Peripheral Architecture ................................ 6 I/O Processor Features ......................................... 10 Sy.