SAM3U4E
SAM3U4E is SMART ARM-based Flash MCU manufactured by Atmel.
- Part of the SAM3U comparator family.
- Part of the SAM3U comparator family.
Description
The Atmel® | SMART SAM3U series is a member of a family of Flash microcontrollers based on the high performance 32-bit ARM® Cortex®-M3 RISC processor. It operates at a maximum speed of 96 MHz and features up to 256 Kbytes of Flash and up to 52 Kbytes of SRAM. The peripheral set includes a High Speed USB Device Port with embedded transceiver, a High Speed MCI for SDIO/SD/MMC, an External Bus Interface with NAND Flash controller, up to 4 USARTs, up to 2 TWIs, up to 5 SPIs, as well as 4 PWM timers, one 3-channel 16bit general-purpose timer, a low-power RTC, a 12-bit ADC and a 10-bit ADC. The SAM3U devices have three software-selectable low-power modes: Sleep, Wait, and Backup. In Sleep mode, the processor is stopped while all other functions can be kept running. In Wait mode, all clocks and functions are stopped but some peripherals can be configured to wake up the system based on predefined conditions. In Backup mode, only the RTC, RTT, and wake-up logic are running. The Real-time Event Managment allows peripherals to receive, react to and send events in Active and Sleep modes without processor intervention. The SAM3U architecture is specifically designed to sustain high speed data transfers. It includes a multi-layer bus matrix as well as multiple SRAM banks, PDC and DMA channels that enable it to run tasks in parallel and maximize data throughput. It can operate from 1.62V to 3.6V and es in 100-pin and 144-pin LQFP and BGA packages. The SAM3U device is particularly well suited for USB applications: data loggers, PC peripherals and any high speed bridge (USB to SDIO, USB to SPI, USB to External Bus Interface).
Atmel-6430G-ATARM-SAM3U-Series-Datasheet_31-Mar-15
1. Features
- Core ̶ ARM Cortex-M3 revision 2.0 running at up to 96 MHz ̶ Memory Protection Unit (MPU) ̶ Thumb®-2 instruction set
- Memories ̶ 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator, dual bank ̶ 16 to 48 Kbytes embedded SRAM with dual banks ̶ 16 Kbytes ROM with...