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* Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements Source and Sink Current up to 3A High Accuracy Output Voltage at Full-load Adj.

Output voltage is designed to track the reference voltage within a 2% (DDR I) and 3% (DDR II) tolerance for load regula.

The AP2302 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 3A current continuously, offers enough current for most DDR applications. Output voltage i.

AP2301

AP2301A

AP2301AGN

AP2301AGN-HF

AP2301AGN-HF-3

AP2301BGN-HF

AP2301EN-HF

AP2301GN

AP2301GN-HF

AP2301GN-HF-3

AP2301N

AP2302AGN-HF

AP2302AGN-HF-3

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