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GW3887A Datasheet Preview

GW3887A Datasheet

Wireless LAN Integrated Medium Access Controller

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GW3887A
Wireless LAN Integrated Medium Access Controller with
Baseband Processor
The Conexant GW3887A Wireless LAN Integrated Media Access Controller
with Baseband Processor is part of both the PRISM GT™ single band and
PRISM WWR™ dual band radio chip sets. The GW3887A directly interfaces
with Conexant’s ISL3686B Single Band Direct Conversion Transceiver.
Adding Conexant’s ISL3084 5GHz VCO and ISL3980 Power Amp completes
an end-to-end WLAN chip set solution compliant with 802.11b/g standards.
Additionally, the GW3887A directly interfaces with Conexant’s ISL3692 Dual
Band Direct Conversion Transceiver. Adding Conexant’s ISL3092 11GHz
VCO and ISL3992 Dual Band Power Amp completes an end-to-end WLAN
chip set solution compliant with 802.11a/b/g/h/i/j standards. The 802.11
protocol is implemented in firmware supporting custom WLAN solutions.
The GW3887A improvements over the GW3887 include the addition of an
internal 48MHz oscillator, which eliminates several external components
from the radio design.
Software implements the full IEEE 802.11 Wireless LAN MAC protocol. It
supports BSS and IBSS operation under DCF, and operation under the
optional Point Coordination Function (PCF). Active scanning is performed
autonomously once initiated by host command. Host interface command
and status handshakes allow concurrent operations from multi-threaded I/
O drivers.
Orthogonal Frequency Division Multiplexing (OFDM) of 52 sub-carriers
modulated with BPSK, QPSK, 16QAM or 64QAM and a variety of
convolutional coding rates provides 8 selectable data rates at 2.4GHz and
5GHz. Differential phase shift keying modulation schemes, DBPSK and
DQPSK with data scrambling capability along with Complementary Code
Keying provide an additional 4 selectable data rates at 2.4GHz.
Built-in flexibility allows the GW3887A to be configured for a range of
applications. The MAC is based on the ARM 946E processor core that
offers a wide variety of code development support tools.
The GW3887A is housed in a thin plastic BGA package suitable for USB
2.0 Wireless LAN small form factor circuit card applications.
Features
• Firmware implements the full IEEE
802.11a/b/g/h/i/j Wireless LAN MAC
protocols
• Internal WEP Engine allows 64 or 128 bit
Encryption
• AES Hardware Accelerator
• Start-up modes allow the USB vendor and
device ID to be initialized from a small
external serial EEPROM. This allows
firmware to be downloaded from the host.
• On-chip SRAM memory
• A low frequency crystal oscillator can
maintain time, which allows the high
frequency clock source to be powered off
during sleep mode.
• Firmware controlled antenna diversity
• Data Rates: 1, 2, 5.5, 6, 9, 11, 12, 18, 24,
36, 48, & 54Mbps
• Modulation: OFDM with BPSK, QPSK,
16QAM, 64QAM; DBPSK; DQPSK and
CCK
• Convolutional coding and interleaving on
all OFDM rates
• Targeted for OFDM Multipath Delay
Spreads >800ns for 6Mbps, and >100ns
for 54Mbps
• Targeted for CCK Multipath Delay
Spreads >90ns at 11Mbps, >200ns at
5.5Mbps and >360ns at 1 and 2Mbps
• Direct interface with the ISL3692 and
ISL3686 Direct Conversion transceiver
• USB 2.0 Wireless LAN Adapters
A/D
BB
PROCESSOR
MAC
USB
2.0
Interface
D/A
GW3887A
SRAM
Figure 1: Simplified Block Diagram
Preliminary Data Sheet
November 12, 2004
Conexant Systems, Inc.
Proprietary - Use Pursuant to NDA
DO-406971-DS
Issue 2




Conexant

GW3887A Datasheet Preview

GW3887A Datasheet

Wireless LAN Integrated Medium Access Controller

No Preview Available !

GW3887A Data Sheet
November 12, 2004
1 Signal Descriptions
Table 1 provides detailed pin information.
Table 1: GW3887A Signal Descriptions (Sheet 1 of 5)
Pin Name
coreVDDD
coreVDDD
ioVDDD
GNDD
coreVDDD
ioVDDD
TEST1
TEST6
SERCLK
SERDIN
coreVDDD
ioVDDD
TDI
coreVDDD
ioVDDD
TMSEL2
GP2-13
UTMI-2
UTMI-1
TEST4
GNDD
TSTCLK44in
TSTCLK80in
coreVDDD
ioVDDD
GNDD
UartSIN
GNDD
TMS
TDO
TMSEL1
coreVDDD
GP2-11
TEST10
TEST9
TEST3
TEST2
TEST0
IoVDDD
CLKOUT
UartSOUT
SERCS_N
SERINT
BGA Ball
Assignment
a1
a10
a11
a12
a13
a14
a15
a16
a2
a3
a4
a5
a6
a7
a8
a9
b1
b10
b11
b12
b13
b14
b15
b16
b2
b3
b4
b5
b6
b7
b8
b9
c1
c10
c11
c12
c13
c14
c15
c16
c2
c3
c4
Pad Type
supply
supply
supply
supply
supply
supply
Bidir as output
Bidir as output
Input
BIDIR
supply
supply
Bidir as input
supply
supply
Bidir as input
bidir
Input
Input
Bidir as output
supply
Schmitt input
Schmitt input
supply
supply
supply
Schmitt input
supply
Bidir as input
bidir
Bidir as input
supply
bidir
Bidir as output
Bidir as output
Bidir as output
Bidir as output
Bidir as output
supply
Bidir as output
Bidir as output
Input
Output
Pin I/O
TYPE
none
none
none
none
none
none
none
none
none
none
up
none
none
down
up
none
none
none
none
down
down
none
none
none
down
none
up
none
down
none
up
none
none
none
none
none
none
none
none
Description
Digital core supply(1.8V)
Digital core supply(1.8V)
Digital IO supply (3.3V)
Digital IO and core ground
Digital core supply(1.8V)
Digital IO supply (3.3V)
BBP testbus
BBP testbus
Serial Host Clock
Serial host data in for 4-wire interface. Bidir for 3 wire interface
Digital core supply(1.8V)
Digital IO supply (3.3V)
JTAG test serial data input
Digital core supply(1.8V)
Digital IO supply (3.3V)
Testmode select pin
General purpose
UTMI_LineState[1]
UTMI_LineState[0]
BBP testbus
Digital IO and core ground
ATE 44MHz clock in
ATE 80MHz clock in
Digital core supply(1.8V)
Digital IO supply (3.3V)
Digital IO and core ground
Uart serial data input
Digital IO and core ground
JTAG test mode select
JTAG test serial data output
Testmode select pin
Digital core supply(1.8V)
CSTSCHG
BBP testbus
BBP testbus
BBP testbus
BBP testbus
BBP testbus (LSB)
Digital IO supply (3.3V)
40MHz clock out
Uart output pad
Serial Host Chip Select
Serial Host Interrupt
Conexant Systems, Inc.
DO-406971-DS
2
Proprietary - Use Pursuant to NDA
Issue 2


Part Number GW3887A
Description Wireless LAN Integrated Medium Access Controller
Maker Conexant
Total Page 12 Pages
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