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Connor-Winfield

SCG2540 Datasheet Preview

SCG2540 Datasheet

Synchronous Clock Generators

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2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
SCG2540
Synchronous Clock
Generators
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
General Description
The SCG2540 is a mixed-signal phase lock loop
generating CMOS outputs from an intrinsically low jitter
voltage controlled crystal oscillator.
The SCG2540 can lock to one of two possible input
reference frequencies at 10 kHz which is selectable
using one input select pin.
Further features include an alarm output to indicate
Loss of Reference, LOR, or Loss of Lock, LOL. If only
one of the references is lost, the unit will disable its
phase detector and will signal an alarm, but will not
switch reference automatically. If both references are
lost, the SCG2540 will enter a Free Run state which will
guarantee a 20 ppm accurate output. Additionally, the
Free Run mode may be entered manually by applying a
high signal to the Force Free Run pin. If the unit is in
Free Run mode, the Free Run status pin will be high.
All outputs, except the Oscillator Output, may be put
into the tri-state high impedance condition for external
testing purposes by applying a high signal to the Reset/
Tri-State pin.
The filtered 10 kHz is derived from the oscillator
output. The offset between the filtered output and the
reference input will change with each reference
rearrangement.
The package maximum dimensions are .780” x .830”
x .35” on a six layer FR4 board with surface mount pins.
Parts are assembled using high temperature solder to
withstand surface mount reflow process.
Features
Phase Locked Output
Frequency Control
Intrinsically Low Jitter, Crystal
Oscillator Derived Output
Two Selectable References
@ 10 kHz
Alarm Output
Tri-State Alarm Outputs and
Reference Output
Force Free Run Function
Automatic Free Run Operation
upon loss of both references
Input Duty Cycle Tolerant
3.3 Volt Power Supply
Small Size: 0.78” x 0.83” x 0.35”
maximum
Surface Mount, DIL Package




Connor-Winfield

SCG2540 Datasheet Preview

SCG2540 Datasheet

Synchronous Clock Generators

No Preview Available !

Table 1
Symbol
VCC
VI
TS
Parameter
Power Supply Voltage
Input Voltage
Storage Temperature
Absolute Maximum Rating
Minimum
-0.5
-0.5
-65.0
Nominal
-
-
-
Maximum
+4.0
+5.5
+150.0
Units
Volts
Volts
°C
Table 2
Operating Specifications
Parameter
Specifications
Voltage
3.3V ±5%
Current
100 mA Typical
Oscillator Output Frequencies
20.48 MHz
Temperature Range
0 to 70°C
Input Frequency Ref 1 and Ref 2
10 kHz
Input Jitter Tolerance
(Jitter Frequencies > 10 Hz)
Jitter Bandwidth
1µs Typical
< 10 Hz
Typical Acquisition Time Data
Acquisition from a cold power-up:
Phase lock settled:
30 - 60s
Alarm time:
<1.0s Typical
Acquisition from Free Run:
Phase lock settled:
30 - 60s
Alarm time:
<1.0s Typical
Frequency lock with a 20PPM reference frequency step: Typically 0.5s.
Phase lock during a switch between equal frequency references: Typically 0.5s, no alarm should be issued
Capture/Pull-In Range
± 25 ppm Minimum
Output Duty Cycle
40/60 % Min/Max @ 50% Level
Output Rise and Fall Time
3 nS @ 20% to 80% output level
Output Load
30 pF
Alarm
LOR/LOL Status Signal Output
Free Run Accuracy
±20 ppm
Package
Fr4 SM 0.78” x 0.83” x 0.350” (Maximum)
MTIE @ Synchronization Rearrangement
GR-253-CORE, 1999 R5-136
Table 3
Symbol
VIH
VIL
T
IO
COUT
VHO
V
IO
TIR
Input and Output Characteristics
Parameter
High level input voltage
Low level input voltage
I/O to output valid
Output capacitance
High level output voltage loh = -4mA
Low Level output voltage lo1 = 8mA
Input reference signal pulse width
Minimum
2.0
0
-
-
2.40
-
30
Nominal
-
-
-
-
-
-
-
Maximum
5.5
0.8
10
10
-
0.4
-
Units
V
V
nS
pF
-
-
nS
Notes
Notes
1.0
2.0
3.0, 4.0
Notes
Vcc Min
Vcc Max
Preliminary Data Sheet #: SG049 Page 2 of 12 Rev: P01 Date: 11/11/03
© Copyright 2003 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice


Part Number SCG2540
Description Synchronous Clock Generators
Maker Connor-Winfield
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