The SCG4000 Series is a digital phase locked loop
generating a LVPECL outputs from an intrinsically low
jitter voltage controlled crystal oscillator. The LVPECL
outputs may be disabled. The jitter attenuated internal
reference, divided down from the output frequency, is also
output to a pin.
The SCG4000 Series can lock to one of four possible
reference frequencies from 8 to 64 KHz, which is
selectable using two input select pins. A filtered reference
output signal is available at the same frequency. The unit
has an acquisition time of about 1 second and it is
tolerant of different reference duty cycles.
Functional Block Diagram
Further features include alarm outputs for Loss-of-
Reference (LOR) and Loss-of-Lock (LOL). During the
LOR alarm, the SCG400 will also enter a Free Run
state, which will guarantee a 20 ppm accurate output.
Additionally the Free Run mode may be entered
The alarms and reference output may be put into
the tri-state high impedance condition for external
The package dimensions are 1” x 1.025” x .407” on
a 6 layer FR4 board with castellated pins. Parts are
assembled using high temperature solder to withstand
63/37 alloy, 180° C surface mount reflow processes.
T8 B #ÃTr
7 ypxÃ9 vht
Force Free Run
D E T E C T IO N
D IV ID E R
AN ALO G
F IL T E R
D IV ID E R
LOL Alarm Output
LOR Alarm Output
Model Comparison Table
= Input Ref Freq.
(Pin #16 & 18)
*Features which differentiate a model from the base model (SCG4000) are highlighted in boldface color and in the notes column.
Data Sheet #: SG031 Page 2 of 12 Rev: A01 Date: 06 / 15 / 01
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice