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CY7C1382S - 18-Mbit (512 K x 36/1 M x 18) Pipelined SRAM

Download the CY7C1382S datasheet PDF. This datasheet also covers the CY7C1380S variant, as both devices belong to the same 18-mbit (512 k x 36/1 m x 18) pipelined sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY7C1380S/CY7C1382S SRAM integrates 524,288 × 36 and 1,048,576 × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

Key Features

  • Supports bus operation up to 167 MHz.
  • Available speed grade is 167 MHz.
  • Registered inputs and outputs for pipelined operation.
  • 3.3 V core power supply.
  • 2.5 V or 3.3 V I/O power supply.
  • Fast clock-to-output times.
  • 3.4 ns (for 167 MHz device).
  • Provides high-performance 3-1-1-1 access rate.
  • User selectable burst counter supporting Intel Pentium® interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchro.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1380S-Cypress.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY7C1380S CY7C1382S 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM Features ■ Supports bus operation up to 167 MHz ■ Available speed grade is 167 MHz ■ Registered inputs and outputs for pipelined operation ■ 3.3 V core power supply ■ 2.5 V or 3.3 V I/O power supply ■ Fast clock-to-output times ❐ 3.