CY9BF524M Datasheet | Cypress

Features 32-bit Arm® Cortex®-M3 Core - Processor version: r2p1 - Up to 72 MHz Frequency Operation - Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels - 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] - Dual operation Flash memory  Dual Operation Flash memory has the upper bank and the lower bank. So, this series could implement erase, write and read operations for each bank simultaneously.  Main area: Up to 256 Kbytes (Up to 240 Kbytes upper bank + 16 Kbytes lower bank)  Work area: 32 Kbytes (lower bank) - Read cycle: 0 wait-cycle - Security function for code protection [SRAM] This Series on-chip SRAM is posed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. - SRAM0: Up to 16 Kbytes - SRAM1: Up to 16 Kbytes USB Interface The USB interface is posed of Device and Host. PLL for USB is built-in, USB clock can be generated by multiplication of Main clock. [USB device] - USB2.0 Full-Speed supported - Max 6 End Point supported  End Point 0 is control transfer  End Point 1, 2 can select Bulk-transfer, Interrupt-transfer or Isochronous-transfer  End Point 3 to 5 can select Bulk-transfer or Interrupt-transfer  End Point 1 to 5 are prised of Double Buffers.  The size of each endpoint is according to the follows. - Endpoint 0, 2 to 5: 64 bytes - Endpoint 1: 256 bytes [USB host] - USB2.0 Full/Low-speed supported - Bulk-transfer, interrupt-transfer and Isochronous-transfer support - USB Device connected/dis-connected automatic detection - Automatic processing of the IN/OUT token handshake packet - Max 256-byte packet-length supported - Wake-up function supported CAN Interface - patible with CAN Specification 2.0A/B - Maximum transfer rate: 1 Mbps - Built-in 32 message buffer Multi-function Serial Interface (Max eight channels) - 4 channels with 16 steps×9-bit FIFO...