CY2DL814
Features
- -
- - Low-voltage operation VDD = 3.3V 1:4 Fanout Single-input configurable for
- LVDS, LVPECL, or LVTTL
- Four differential pairs of LVDS outputs Drives 50- or 100-ohm load (selectable) Low input capacitance Low output skew Does not exceed Bellcore 802.3 standards Operation at ⇒ 350 MHz
- 700 Mbps Low propagation delay Typical (tpd < 4 ns) Industrial versions available Packages available include TSSOP/SOIC
Description
The Cypress CY2 series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DL814 fanout buffer features a single LVDS-, LVPECL-, or LVTTL-patible input and four LVDS output pairs. Designed for data-munication clock management applications, the fanout from a single input reduces loading on the input clock. The CY2DL814 is ideal for both level translations from single ended to LVDS and/or for the distribution of LVDS-based clock signals. The Cypress CY2DL814 has configurable input...
