CY2DL1510 Datasheet - Cypress Semiconductor

CY2DL1510 1:10 Differential LVDS Fanout Buffer

The CY2DL1510 is an ultra-low noise, low-skew, low-propagation delay 1:10 differential LVDS fanout buffer targeted to meet the requirements of high-speed clock distribution applications. The on-chip 100  input termination resistor reduces board component count, while the synchronous clock enable fu.

CY2DL1510 Features

* Low-voltage differential signal (LVDS) input with on-chip 100  input termination resistor

* Ten differential LVDS outputs

* 40 ps maximum output-to-output skew

* 600 ps maximum propagation delay

* 0.11 ps maximum additive RMS phase jitter at 156.25 MHz (12 kHz to 20 MHz offset

CY2DL1510_CypressSemiconductor.pdf