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CY7C1307BV18 - 18-Mbit Burst of 4 Pipelined SRAM

This page provides the datasheet information for the CY7C1307BV18, a member of the CY7C1305BV18 18-Mbit Burst of 4 Pipelined SRAM family.

Product Overview

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Datasheet preview – CY7C1307BV18

Datasheet Details

Part number CY7C1307BV18
Manufacturer Cypress Semiconductor
File Size 678.24 KB
Description 18-Mbit Burst of 4 Pipelined SRAM
Datasheet download datasheet CY7C1307BV18 Datasheet
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CY7C1307BV18 Product details

Description

Separate independent Read and Write data ports Supports concurrent transactions 167-MHz Clock for high bandwidth 2.5 ns Clock-to-Valid access time 4-Word Burst for reducing the address bus frequency Double Data Rate (DDR) interfaces on bot

Features

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